EI2353 DIGITAL SYSTEM DESIGN SYLLABUS | ANNA UNIVERSITY BE E&I 6TH SEMESTER SYLLABUS REGULATION 2008 2011 2012-2013 BELOW IS THE ANNA UNIVERSITY SIXTH SEMESTER B.E ELECTRONICS AND INSTRUMENTATION ENGINEERING DEPARTMENT SYLLABUS, TEXTBOOKS, REFERENCE BOOKS,EXAM PORTIONS,QUESTION BANK,PREVIOUS YEAR QUESTION PAPERS,MODEL QUESTION PAPERS, CLASS NOTES, IMPORTANT 2 MARKS, 8 MARKS, 16 MARKS TOPICS. IT IS APPLICABLE FOR ALL STUDENTS ADMITTED IN THE YEAR 2011 2012-2013 (ANNA UNIVERSITY CHENNAI,TRICHY,MADURAI, TIRUNELVELI,COIMBATORE), 2008 REGULATION OF ANNA UNIVERSITY CHENNAI AND STUDENTS ADMITTED IN ANNA UNIVERSITY CHENNAI DURING 2009
EI2353 DIGITAL SYSTEM DESIGN L T P C
3 0 0 3
AIM
The course is designed to introduce the fundamental concepts and design of digital system.
OBJECTIVES
To introduce the most common digital logic families.
To provide introduction to programmable logic devices such as PLA, PAL, FPGA, CPLD etc.
To provide introduction to Digital Memories. Such as ROM, RAM, SRAM, etc.
To discuss case studies on Digital System design.
76
UNIT I DIGITAL LOGIC FAMILIES 9
TTL, CMOS, NMOS, Dynamic MOS , ECL, I2L, Operating conditions, Parameters, Interpreting data
sheets. Power supply grounding considerations for digital ICs, TTL – to – CMOS Interface, CMOS –
to – TTL interface.
UNIT II PROGRAMMABLE LOGIC DEVICES 9
Programmable logic Arrays, Programmable array logic, Realizing logic function using Multiplexers,
Decoders, ROM, PLA, PAL. Design of sequential Networks using PAL, PLA – Programmable Gate
arrays – FPGA – CPLD.
UNIT III DIGITAL MEMORIES 9
The role of Memory in a system – memory types and terminology – ROM – types of ROM – RAM –
SRAM – DRAM – Expanding word size and capacity – Applications.
UNIT IV DIGITAL SYSTEM DESIGN CASE STUDIES 9
Multiplexing displays – Frequency counters – Time measurement – Digital voltmeter – PRBS
generator – Interfacing with flash memory.
UNIT V DESIGN FOR TESTABILITY 9
Teatability – Ad hoc design for testing techniques – controllability and observability by means of
scan registers – Generic scan based designa – Board level and system level DFT approaches.
TOTAL: 45 PERIODS
TEXT BOOKS
1. Charles H.Roth, ‘Fundamentals Logic Design’, Jaico Publishing, IV edition, 2002.
2. Donald. P. Leach, Albert paul Malvino, Goutam Suha,’Digital Principles and Applications’ Tata
McGraw – Hill , Sixth edition .
3. Miron Abramonici, Melvin. A. Rrewer, Arthur.D. Friedman,Digital system testing and testable
design, Jaico publishing house.
REFERENCES
1. Theodore. F. Bogart,’ Introduction to Digital Circuits’, McGraw – Hill International
edn.1992
2. Ronald J.Tocci, Neal .S. Widmer,’Digital System Principles and Applications’, Pearson
Education, 8th edition, Asia, 2002.
3. On demand public key management for wireless Ad Hoc networks.
4. Efficient hybrid security mechanisms for heterogeneous sensor networks.
5. Performance analysis of Handoff techniques based on Mobile Ip, TCP – migrate and SIP.
EI2353 DIGITAL SYSTEM DESIGN L T P C
3 0 0 3
AIM
The course is designed to introduce the fundamental concepts and design of digital system.
OBJECTIVES
To introduce the most common digital logic families.
To provide introduction to programmable logic devices such as PLA, PAL, FPGA, CPLD etc.
To provide introduction to Digital Memories. Such as ROM, RAM, SRAM, etc.
To discuss case studies on Digital System design.
76
UNIT I DIGITAL LOGIC FAMILIES 9
TTL, CMOS, NMOS, Dynamic MOS , ECL, I2L, Operating conditions, Parameters, Interpreting data
sheets. Power supply grounding considerations for digital ICs, TTL – to – CMOS Interface, CMOS –
to – TTL interface.
UNIT II PROGRAMMABLE LOGIC DEVICES 9
Programmable logic Arrays, Programmable array logic, Realizing logic function using Multiplexers,
Decoders, ROM, PLA, PAL. Design of sequential Networks using PAL, PLA – Programmable Gate
arrays – FPGA – CPLD.
UNIT III DIGITAL MEMORIES 9
The role of Memory in a system – memory types and terminology – ROM – types of ROM – RAM –
SRAM – DRAM – Expanding word size and capacity – Applications.
UNIT IV DIGITAL SYSTEM DESIGN CASE STUDIES 9
Multiplexing displays – Frequency counters – Time measurement – Digital voltmeter – PRBS
generator – Interfacing with flash memory.
UNIT V DESIGN FOR TESTABILITY 9
Teatability – Ad hoc design for testing techniques – controllability and observability by means of
scan registers – Generic scan based designa – Board level and system level DFT approaches.
TOTAL: 45 PERIODS
TEXT BOOKS
1. Charles H.Roth, ‘Fundamentals Logic Design’, Jaico Publishing, IV edition, 2002.
2. Donald. P. Leach, Albert paul Malvino, Goutam Suha,’Digital Principles and Applications’ Tata
McGraw – Hill , Sixth edition .
3. Miron Abramonici, Melvin. A. Rrewer, Arthur.D. Friedman,Digital system testing and testable
design, Jaico publishing house.
REFERENCES
1. Theodore. F. Bogart,’ Introduction to Digital Circuits’, McGraw – Hill International
edn.1992
2. Ronald J.Tocci, Neal .S. Widmer,’Digital System Principles and Applications’, Pearson
Education, 8th edition, Asia, 2002.
3. On demand public key management for wireless Ad Hoc networks.
4. Efficient hybrid security mechanisms for heterogeneous sensor networks.
5. Performance analysis of Handoff techniques based on Mobile Ip, TCP – migrate and SIP.
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