SY9311 ADVANCED DIGITAL SYSTEM DESIGN SYLLABUS | ANNA UNIVERSITY ME EMBEDDED SYSTEMS 1ST SEM SYLLABUS REGULATION 2009 2011 2012-2013

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SY9311 ADVANCED DIGITAL SYSTEM DESIGN SYLLABUS | ANNA UNIVERSITY ME EMBEDDED SYSTEMS 1ST SEM SYLLABUS REGULATION 2009 2011 2012-2013 BELOW IS THE ANNA UNIVERSITY FIRST SEMESTER M.E EMBEDDED SYSTEMS DEPARTMENT SYLLABUS, TEXTBOOKS, REFERENCE BOOKS,EXAM PORTIONS,QUESTION BANK,PREVIOUS YEAR QUESTION PAPERS,MODEL QUESTION PAPERS, CLASS NOTES, IMPORTANT 2 MARKS, 8 MARKS, 16 MARKS TOPICS. IT IS APPLICABLE FOR ALL STUDENTS ADMITTED IN THE YEAR 2011 2012-2013 (ANNA UNIVERSITY CHENNAI,TRICHY,MADURAI,TIRUNELVELI,COIMBATORE), 2009 REGULATION OF ANNA UNIVERSITY CHENNAI AND STUDENTS ADMITTED IN ANNA UNIVERSITY CHENNAI DURING 2009

SY9311 ADVANCED DIGITAL SYSTEM DESIGN L T P C
3 0 0 3
UNIT – I SEQUENTIAL CIRCUIT DESIGN (9)
Analysis of Clocked Synchronous Sequential Networks (CSSN) Modeling of CSSN – State
Stable Assignment and Reduction – Design of CSSN – Design of Iterative Circuits – ASM
Chart – ASM Realization.
UNIT – II ASYNCHRONOUS SEQUENTIAL CIRCUIT DESIGN (9)
Analysis of Asynchronous Sequential Circuit (ASC) – Flow Table Reduction – Races in
ASC – State Assignment – Problem and the Transition Table – Design of ASC – Static and
Dynamic Hazards – Essential Hazards – Data Synchronizers – Designing Vending
Machine Controller – Mixed Operating Mode Asynchronous Circuits.
UNIT – III FAULT DIAGNOSIS AND TESTABILITY ALGORITHMS (9)
Fault Table Method – Path Sensitization Method – Boolean Difference Method – Kohavi
Algorithm – Tolerance Techniques – The Compact Algorithm – Practical PLA’s – Fault in
PLA – Test Generation – Masking Cycle – DFT Schemes – Built-in Self Test.
UNIT – IV SYNCHRONOUS DESIGN USING PROGRAMMABLE DEVICES (9)
EPROM to Realize a Sequential Circuit – Programmable Logic Devices – Designing a
Synchronous Sequential Circuit using a GAL – EPROM – Realization State machine using
PLD – FPGA – Xilinx FPGA – Xilinx 2000 - Xilinx 3000
UNIT – V SYSTEM DESIGN USING VHDL (9)
VHDL Description of Combinational Circuits – Arrays – VHDL Operators – Compilation and
Simulation of VHDL Code – Modelling using VHDL – Flip Flops – Registers – Counters –
Sequential Machine – Combinational Logic Circuits – VHDL Code for – Serial Adder,
Binary Multiplier – Binary Divider – complete Sequential Systems – Design of a Simple
Microprocessor.
TOTAL: 45 PERIODS
REFERENCES:
1. Donald G. Givone “Digital principles and Design” Tata McGraw Hill 2002.
2. John M Yarbrough “Digital Logic appns. and Design” Thomson Learning, 2001
3. Nripendra N Biswas “Logic Design Theory” Prentice Hall of India, 2001
4. Charles H. Roth Jr. “Digital System Design using VHDL” Thomson Learning, 1998.
5. Charles H. Roth Jr. “Fundamentals of Logic design” Thomson Learning, 2004.
6. Stephen Brown and Zvonk Vranesic “Fundamentals of Digital Logic with VHDL
Deisgn”Tata McGraw Hill, 2002.
7. Navabi.Z. “VHDL Analysis and Modeling of Digital Systems. McGraw
International,1998.
8. Parag K Lala, “Digital System design using PLD” BS Publications, 2003
9. Parag K Lala, “ Digital Circuit Testing and Testability” Academic Press, 1997.
10. Peter J Ashendem, “The Designers Guide to VHDL” Harcourt India (P) Ltd, 2002
11. Mark Zwolinski, “Digital System Design with VHDL” Pearson Education, 2004
12. Skahill. K, “VHDL for Programmable Logic” Pearson education, 1996.
13. Nelson V.P., Nagale H.T., Carroll B.D., and Irwin J.D., “Digital Logic Circuit Analysis
and Design”, Prentice Hall International Inc.1995.
14. Dueck R.K., “Digital Design with CPLD applications and VHDL” Thomson Delmer
Learning, 2001.